Design of electrostatic discharge of PC短森B plate and the soluti國長ons

  2013-03-26

In the design of PCB board, 文時can be layered, proper layout and in對店stallation of anti 司子ESD design and implementation of 說機PCB. By adjusting the PCB layout, c看又an be very good to prevent ESD. * mul見懂tilayer PCB is used as far 的對as possible, the double PCB, the 數上ground plane and powe購綠r plane, and clo拍學sely spaced signa們公l earth line spacing can道街 reduce common mode impedance and in店放ductance coupling, so as to achieve t懂線he double PCB 1/10 to 1/100. For the t討件op and bottom surfa但生ces are components, with a short 秒近connecting line.
From the human body, the envi都還ronment and internal electronic equ從北ipment for semiconductor chip 照說precision electro電動static will cause damage, such 風答as through the components 黑朋inside the thin風制 insulating layer; a gate MOS子看FET lesion and CMOS components; CMO中湖S device trigger弟行s lock; short PN juncti城妹on reverse biased; 城船short road to biased PN juncti在黑on; active devices within the melting微還 welding wire or wire. In ord海是er to eliminate t舊店he electrostatic disc朋靜harge (ESD) interferen拿短ce and damage to the electronic equi白房pment, need to tak坐道e a variety of techni嗎笑cal means of preve公窗ntion.
In the design of PCB board,店報 can be layered, proper layout and 姐化installation of a媽通nti ESD design 外土and implementation of PCB. In the山懂 design process, through the forec區慢ast can be modi頻機fied only to increase 廠友or decrease the vast majori站讀ty of design components. By adj紅亮usting the PCB layout, ca北去n be very good to prevent ESD. Th煙愛e following are some o可吧f the common measure.
* multilayer PCB is used體樂 as far as possible, the double PCB, t路東he ground plane and po那森wer plane, and closely spaced sig關可nal earth line spacing can reduce男靜 common mode impeda答弟nce and inductance coup冷弟ling, so as to achieve the飛花 double PCB 1/10 to 1/100. As 討懂each signal layer are close to a power 舞懂supply layer or ground laye費綠r. For the top and bottom 這商surfaces are components, with a 做亮short connecting wire and a lo哥是t of filling high den白高sity PCB, can consider to use the i務船nner line.
* for a double PCB, by closely interwov遠區en power and ground g日畫rid. Power line is close to the groun呢低d, between vertical and我做 horizontal line or fi文媽ll area, as much as p廠章ossible to connect. Th器我e size of the grid side is大他 less than or equal to 60mm, if 歌妹possible, the grid s對從ize should be less than 13mm.
* make sure that窗動 every circuit as com關在pact as possible.
As far as possible海要 to all connectors are put aside.
If possible, the introduction of the姐算 power line from the card and 呢遠away from the central, to be dir河短ectly influenced by ESD region.